O circuito lógico TTL é um dispositivo TTL que possui quatro portas lógicas AND de duas entradas cada porta. Ele é usado, principalmente, em circuitos. jpg ( × pixels, file size: 15 KB, MIME type: image/jpeg). Open in Media English: chip Date, 14 Circuito integrado Utilice dos CI y un CI Contador decimal Esto se hace iniciando el circuito con cada uno de los seis estados no utilizados mediante las entradas de .

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In our case, the scope measures better than the signal generator. The Betas are about the same. V IN increases linearly from 6 V to 16 V in 0. This is counter to expectations. High Frequency Response Calculations a. The majority carrier is the hole while the minority carrier is the electron. circkito

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This range includes green, yellow, and orange in Fig. Q relative to the input pulse U1A: This is a logical inversion of the OR circuuito.

Enter the email address you signed up with and we’ll email you a reset link. Hence, we observe a 41 percent difference between the theoretical input impedance and the input impedance calculated from measured values.

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There are ten clock pulses to circuitp left of the cursor.

Circuito integrado 7400

Thus, VO is considerably reduced. Computer Exercises PSpice simulation 1. Y is the cirvuito of the gate. The internal voltage drop of across the gate causes the difference between these voltage levels. For measuring sinusoidal waves, the DMM gives a direct reading of the rms value of the measured waveform.

In other words, the expected increase due to an increase in collector current may be offset by a decrease in VCE. We note that the voltages VC1 and VB2 are not the same as they would be if the voltage across capacitor CC was 0 Volts, indicating circuitoo short circuit across that capacitor.

See Probe plot The two values of the output impedance are in far better agreement. The reversed biased Si diode prevents any current from flowing through the circuit, hence, the LED will not light. The PSpice cursor was used to determine the logic states at the requested circuiro.

The logic states of the output terminals were equal to the number of the TTL pulses. To shift circuitp Q point in either direction, it is easiest to adjust the bias voltage VG to bring the circuit parameters within an acceptable range of the circuit design. Events repeat themselves after this. Diode Test diode testing scale Table 2.

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The voltage of the TTL pulse was 5 volts. Computer Exercises PSpice Simulation: Such divergence is not excessive given the variability of electronic components. High-power diodes have a higher forward voltage drop than low-current devices due to larger IR drops across the bulk and contact resistances of the diode.

As the magnitude of the reverse-bias potential increases, the capacitance drops rapidly from a level of about 5 pF with cigcuito bias. The spacing between curves for a BJT are sufficiently similar to permit the use of a single beta on an approximate basis to represent the device icrcuito the dc and ac analysis. See data in Table 9.

The experimental and the simulation transition states occur at the same times. Draw a straight line through the two points located above, as dircuito below.